The manufacturing process in which integrated circuits are designed is constantly changing. One method used to put more circuits on a single semiconductor chip is to reduce the size of individual transistors. The size and space between individual transistors and other features essential for operation of a microprocessor may be reduced by making smaller images on a photo-mask. As the images on photo-masks get smaller, the size of the defects that may adversely affect the circuitry also decrease. As the critical size of defects decreases, the number of functional chips recovered from a wafer may decrease. A reduction in the number of functional chips on a wafer usually increases the manufacturing cost of a single functional chip. Several design techniques have been used to increase the yield of good chips.
Redundant circuits are included in a design to replace non-functioning circuits. When a bad circuit is found, it may be replaced with a redundant circuit. For example, in ASIC (Application Specific Integrated Circuit) design, “FET Farms” are included in addition to the circuits required to design the ASIC. A FET farm is a group of logic blocks (NAND gates, NOR gates, etc.) that may be unused if no defects are found in the original design. However, if defective gates are found, replacements from the FET farm may be “patched” in to the overall circuit. In this way, a completely functional chip may be created thereby increasing the overall yield.
Another example of where redundancy may be used to improve the yield of semiconductor chips is sub-array redundancy. Instead of replacing an individual logic gate or a group of logic gates, a redundant sub-array may replace a defective sub-array with a larger array. SRAMs (Static Random Access Memory), DRAMs (Dynamic Random Access Memory) and CAMs (Content Addressable Memory) are examples of arrays that may utilize redundancy. Redundant sub-arrays may be included in the design of these memories. If part of the original array is non-functional, a redundant sub-array may be substituted for the defective sub-array.
While redundant circuit design may help to improve the yield of fully functional microprocessor designs, it does not enable the use of partial arrays. The yield of complex microprocessors may be low when a new process is used to manufacture them. As a result, there may be few fully functional microprocessor chips available to “debug” the electrical design. If a fraction of cache (½, ¼, etc.) on a microprocessor could be made functional and the CPU enabled to work with a fraction of the cache, it would decrease the time required to debug the electrical design of the microprocessor. In addition, microprocessors with fractional caches could be sold for applications that don't require as much cache as a microprocessor with a fully function cache.
The following description of an apparatus and method for achieving fractional caches on a microprocessor addresses a need in the art to reduce debug times of microprocessors and make available more functional microprocessors at an earlier time.